Wiring board and method for manufacturing the same

ABSTRACT

A printed wiring board wiring board including a substrate having a first penetrating hole and multiple second penetrating holes formed around the first penetrating hole, a first conductive portion and a second conductive portion formed on one surface of the substrate, a third conductive portion and a fourth conductive portion formed on the opposite surface of the substrate, a first through-hole conductor formed in the first penetrating hole and connecting the first conductive portion and the third conductive portion, and multiple second through-hole conductors formed in the second penetrating holes and connecting the second conductive portion and the fourth conductive portion. The first through-hole conductor and the second through-hole conductors are made of conductive material filled in the first penetrating hole or the second penetrating holes.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims the benefits of priority to U.S.Application No. 61/319,575, filed Mar. 31, 2010. The contents of thatapplication are incorporated herein by reference in their entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a wiring board and its manufacturingmethod.

2. Discussion of the Background

In Japanese Laid-Open Patent Publication No. 2002-204075, through holeswith a coaxial structure are described. In Japanese Laid-Open PatentPublication No. 2002-204075, two plating processes form a coaxialthrough-hole structure; a plating process for forming an outerthrough-hole conductor, and a plating process for forming an innerthrough-hole conductor. Namely, to form an outer through-hole conductor,plating is performed on the inner wall of a penetrating hole for anouter through hole formed in a core substrate, and then, to form aninner through-hole conductor, plating is performed on the inner wall ofa penetrating hole for an inner through hole. The contents of JapaneseLaid-Open Patent Publication No. 2002-204075 are incorporated herein byreference in their entirety in this application.

SUMMARY OF THE INVENTION

According to one aspect of the present invention, a wiring boardincludes a substrate having a first penetrating hole and multiple secondpenetrating holes formed around the first penetrating hole, a firstconductive portion formed on a surface of the substrate and positionedat one end of the first penetrating hole, a second conductive portionformed on the surface of the substrate and positioned at one ends of thesecond penetrating holes around the first conductive portion, a thirdconductive portion formed on the opposite surface of the substrate andpositioned at the opposite end of the first penetrating hole, a fourthconductive portion formed on the opposite surface of the substrate andpositioned at the opposite ends of the second penetrating holes aroundthe third conductive portion, a first through-hole conductor formed inthe first penetrating hole and having a conductive material filling thefirst penetrating hole of the substrate, the first through-holeconductor electrically connecting the first conductive portion and thethird conductive portion, and multiple second through-hole conductorsformed in the second penetrating holes and having a conductive materialfilling the second penetrating holes, the second through-hole conductorselectrically connecting the second conductive portion and the fourthconductive portion.

According to another aspect of the present invention, a method formanufacturing a wiring board includes preparing a substrate, forming afirst penetrating hole through the substrate, forming multiple secondpenetrating holes through the substrate around the first penetratinghole, forming on a surface of the substrate a first conductive portion,forming on the surface of the substrate a second conductive portionpositioned around the first conductive portion, forming on the oppositesurface of the substrate a third conductive portion, forming on theopposite surface of the substrate a fourth conductive portion positionedaround the third conductive portion, filling a conductive material inthe first penetrating hole such that a first through-hole conductorconnecting the first conductive portion and the third conductive portionis formed in the first penetrating hole, and filling a conductivematerial in the second penetrating holes such that multiple secondthrough-hole conductors connecting the second conductive portion and thefourth conductive portion are formed in the second penetrating holes,respectively.

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete appreciation of the invention and many of the attendantadvantages thereof will be readily obtained as the same becomes betterunderstood by reference to the following detailed description whenconsidered in connection with the accompanying drawings, wherein:

FIG. 1 is a cross-sectional view of a wiring board according to anembodiment of the present invention;

FIG. 2A is a view schematically showing through holes in a coresubstrate;

FIG. 2B is a view showing positions of the through holes in a coresubstrate;

FIG. 2C is a view showing positions of the through holes in a coresubstrate;

FIG. 2D is a view schematically showing through holes in a coresubstrate;

FIG. 2E is a view schematically showing through holes in a coresubstrate;

FIG. 2F is a view schematically showing through holes in a coresubstrate;

FIG. 2G is a view schematically showing through holes in a coresubstrate;

FIG. 2H is a view schematically showing through holes in a coresubstrate;

FIG. 2I is a view schematically showing magnetic fields generated inthrough holes in a core substrate;

FIG. 2J is a view schematically showing magnetic fields generated inthrough holes in a core substrate;

FIG. 2K is a view schematically showing magnetic fields generated inthrough holes in a core substrate;

FIG. 2L is an enlarged cross-sectional view showing through holes in acore substrate;

FIG. 3 is a cross-sectional view showing the inside structure of athrough-hole;

FIG. 4A is a view schematically showing the electrical connection of twothrough-hole structures;

FIG. 4B is another view schematically showing the electrical connectionof two through-hole structures;

FIG. 5A is a view showing a step for forming a core substrate;

FIG. 5B is subsequent to FIG. 5A, a view showing a step for forming acore substrate;

FIG. 5C is subsequent to FIG. 5B, a view showing a step for forming acore substrate;

FIG. 5D is subsequent to FIG. 5C, a view showing a step for forming acore substrate;

FIG. 5E is subsequent to FIG. 5D, a view showing a step for forming acore substrate;

FIG. 5F is subsequent to FIG. 5E, a view showing a step for forming acore substrate;

FIG. 6A is subsequent to FIGS. 5A˜F which show the steps for forming acore substrate, a view showing a step for forming buildup layers;

FIG. 6B is subsequent to FIG. 6A, a view showing a step for formingbuildup layers;

FIG. 6C is subsequent to FIG. 6B, a view showing a step for formingbuildup layers;

FIG. 6D is subsequent to FIG. 6C, a view showing a step for formingbuildup layers;

FIG. 6E is subsequent to FIG. 6D, a view showing a step for formingbuildup layers;

FIG. 6F is subsequent to FIG. 6E, a view showing a step for formingbuildup layers;

FIG. 6G is subsequent to FIG. 6F, a view showing a step for formingbuildup layers;

FIG. 6H is subsequent to FIG. 6G, a view showing a step for formingbuildup layers;

FIG. 7A is subsequent to FIGS. 6A˜H which show the steps for formingbuildup layers, a view showing a step for forming solder-resist layers;

FIG. 7B is subsequent to FIG. 7A, a view showing a step for formingsolder-resist layers;

FIG. 8A is subsequent to FIGS. 7A˜B which show the steps for formingbuildup layers, a view showing a step for surface treatment;

FIG. 8B is subsequent to FIG. 8A, a view showing a step for surfacetreatment;

FIG. 9 is a cross-sectional view showing a modified example of a wiringboard according to an embodiment of the present invention; and

FIG. 10 is a cross-sectional view showing a modified example of a wiringboard according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

The embodiments will now be described with reference to the accompanyingdrawings, wherein like reference numerals designate corresponding oridentical elements throughout the various drawings.

Wiring board 10 of the present embodiment is a printed wiring board. Asshown in FIG. 1, wiring board 10 has core substrate 20, buildup layers(50, 60), solder-resist layers (131, 141), and external connectionterminals (150, 160) made of solder.

Core substrate 20 has insulative substrate 22, first conductive portion(24 a), third conductive portion (24 b), second conductive portion (28a) and fourth conductive portion (28 b), which are made of copper, forexample, multiple outer through-hole conductors 40 and innerthrough-hole conductor 38. Outer through-hole conductors 40 arepositioned at substantially even intervals in a circumferentialdirection with the central axis of inner through-hole conductor 38 attheir center. First conductive portion (24 a) and second conductiveportion (28 a) are formed on a first surface of insulative substrate 22,and third conductive portion (24 b) and fourth conductive portion (28 b)are formed on a second surface of insulative substrate 22.

Insulative substrate 22 is made of epoxy resin, for example. Epoxy resinis preferred to contain reinforcing material such as glass fiber (glassfabric or glass non-woven fabric, for example) and aramid fiber (aramidnon-woven fabric, for example) impregnated with resin. The material forinsulative substrate 22 is not limited specifically. The reinforcingmaterial has a smaller thermal expansion coefficient than a primarymaterial (epoxy resin in the present embodiment).

In insulative substrate 22, first penetrating hole (22 a) is formed,penetrating from the first surface of core substrate 20 through thesecond surface. The cross section of the opening shape of firstpenetrating hole (22 a) is circular, for example.

Plating is filled in first penetrating hole (22 a). By filling plating,inner through-hole conductor 38 (first through-hole conductor) isformed. Namely, inner through-hole conductor 38 is formed to besubstantially cylindrical. Here, plating indicates depositing a layer ofconductor (such as metal) on a surface of metal, resin or the like, aswell as the deposited conductive layer (such as a metal layer). Inaddition, plating includes wet plating such as electrolytic plating andelectroless plating and dry plating such as PVD (Physical VaporDeposition) and CVD (Chemical Vapor Deposition). Inner through-holeconductor 38 is preferred to be made of copper plating because of itssmall electrical resistance.

Cover like first conductive portion (24 a) and third conductive portion(24 b) are formed on inner through-hole conductor 38 to cover its topand bottom surfaces. First conductive portion (24 a) and thirdconductive portion (24 b) are made of copper foil and a plated layer.First conductive portion (24 a) and third conductive portion (24 b) arepositioned opposite each other and sandwich inner through-hole conductor38. Then, first conductive portion (24 a) and third conductive portion(24 b) are electrically connected by inner through-hole conductor 38.

As shown in FIGS. 2A through 2H, second penetrating holes (36 a) whichpenetrate from the first surface of core substrate 20 through the secondsurface are formed outside (around) inner through-hole conductor 38. Thecross section of the opening shape of second penetrating holes (36 a) issubstantially circular, for example.

Plating is filled in second penetrating holes (36 a). By fillingplating, outer through-hole conductors 40 are formed. Namely, outerthrough-hole conductors 40 are formed to be substantially cylindrical.Outer through-hole conductors 40 are preferred to be made of copperplating because of its small electrical resistance. Multiple outerthrough-hole conductors 40 are formed around inner through-holeconductor 38.

On the first surface of core substrate 20, second conductive portion (28a) is formed to cover top surfaces of multiple outer through-holeconductors 40. Also, on the second surface of core substrate 20, fourthconductive portion (28 b) is formed to cover the bottom surfaces ofmultiple outer through-hole conductors 40.

Second conductive portion (28 a) and fourth conductive portion (28 b)are connected by outer through-hole conductors 40.

On the first surface of core substrate 20, the surface of firstconductive portion (24 a) and the surface of second conductive portion(28 a) are positioned on substantially the same plane. Also, on thesecond surface of core substrate 20, the surface of third conductiveportion (24 b) and the surface of fourth conductive portion (28 b) arepositioned on substantially the same plane.

In the following, through holes in core substrate 20 are described withreference to FIGS. 2A through 2H. Here, a simplified version of throughholes is used although they are formed to be narrower in their centralportions as shown in FIG. 1. In wiring board 10 of the presentembodiment, six outer through-hole conductors 40 are positioned atsubstantially even intervals around inner through-hole conductor 38 asshown in a schematic view in FIG. 2A. First conductive portion (24 a) isformed on the top surface of inner through-hole conductor 38, and thirdconductive portion (24 b) is formed on its bottom surface. Firstconductive portion (24 a) and third conductive portion (24 b) arepositioned opposite each other and sandwich inner through-hole conductor38. Also, on the top surfaces of outer through-hole conductors 40,substantially annular second conductive portion (28 a) is formed tosurround first conductive portion (24 a), and on the bottom surfaces,substantially annular fourth conductive portion (28 b) is formed tosurround third conductive portion (24 b). Second conductive portion (28a) and fourth conductive portion (28 b) are positioned opposite eachother and sandwich outer through-hole conductors 40.

In the present embodiment, as shown in a schematic view in FIG. 2B, sixouter through-hole conductors 40 are positioned at substantially evenintervals along the external circumference of second conductive portion(28 a) and fourth conductive portion (28 b) with inner through-holeconductor 38 positioned at their center. Accordingly, outer through-holeconductors 40 are arranged at positions corresponding to the apexes of aregular hexagon.

Here, if the direction of current flowing in outer through-holeconductors 40 and the direction of current flowing in inner through-holeconductor 38 are set opposite from each other, part of the magneticfields generated by the current flowing in outer through-hole conductors40 is offset from part of the magnetic fields generated by the currentflowing in inner through-hole conductor 38. The greater the number ofouter through-hole conductors 40, the more such effects occur.

The diameters of outer through-hole conductors 40 and inner through-holeconductor 38 are each measured at 90 μM, for example. The externaldiameters of first conductive portion (24 a) and third conductiveportion (24 b) are each measured at 140 μm, for example. The innerdiameters of second conductive portion (28 a) and fourth conductiveportion (28 b) are each measured at 290 μm, for example, and theirexternal diameters are each measured at 610 μm, for example.

The shape of second conductive portion (28 a) and fourth conductiveportion (28 b) is not limited to being circular, and it may bepolygonal, for example. Then, outer through-hole conductors 40 may bearranged at positions corresponding to the apexes of a polygon. Namely,as shown in FIG. 2C, second conductive portion (28 a) and fourthconductive portion (28 b) may be formed to be regular hexagons, forexample. When second conductive portion (28 a) and fourth conductiveportion (28 b) are formed as regular hexagons, the outer diameter(distance between opposite sides) of second conductive portion (28 a)and fourth conductive portion (28 b) is measured at 528 μm, for example.

In the present embodiment, six outer through-hole conductors 40 arepositioned around inner through-hole conductor 38. However, any othernumber may be selected for outer through-hole conductors 40. If thenumber of outer through-hole conductors 40 increases, the pitch betweenouter through-hole conductors becomes narrower. Thus, the effect ofshielding magnetic fields increases.

FIG. 2D is a view showing an example in which four outer through-holeconductors 40 are positioned at even intervals along the externalcircumferences of second conductive portion (28 a) and fourth conductiveportion (28 b). In this example, virtual lines connecting the centers ofouter through-hole conductors 40 form a square.

FIG. 2E is a view showing an example in which five outer through-holeconductors 40 are positioned at even intervals along the externalcircumferences of second conductive portion (28 a) and fourth conductiveportion (28 b). In this example, virtual lines connecting the centers ofouter through-hole conductors 40 form a regular pentagon.

FIG. 2F is a view showing an example in which multiple (for example,two) inner through-hole conductors 38 are formed. In such an example,positions of inner through-hole conductors 38 are not limitedspecifically.

In addition, FIGS. 2G and 2H are views showing examples in which firstconductive portion (24 a) and third conductive portion (24 b) are notcompletely surrounded by second conductive portion (28 a) and fourthconductive portion (28 b). FIG. 2G is a view showing an example in whichnotch portions (28 c) are formed in first conductive portion (24 a) andthird conductive portion (24 b) to distribute conductive circuitsextended from second conductive portion (28 a) and fourth conductiveportion (28 b). In such an example, the shape and positions of notchportions (28 c) are not limited specifically. The positions and numbersof inner through-hole conductors 38 and outer through-hole conductors 40are also not limited specifically.

FIG. 2H is a view showing an example in which second conductive portion(28 a) and fourth conductive portion (28 b) are formed substantiallysemicircular. The positions and numbers of inner through-hole conductors38 and outer through-hole conductors 40 are also not limitedspecifically.

As described above, if the direction of current flowing in outerthrough-hole conductors 40 and the direction of current flowing in innerthrough-hole conductor 38 are set opposite from each other, part of themagnetic fields generated by the current flowing in outer through-holeconductors 40 is offset from part of the magnetic fields generated bythe current flowing in inner through-hole conductor 38.

FIG. 2I is a view showing the magnetic fields generated by the currentflowing in outer through-hole conductors 40 and the magnetic fieldsgenerated by the current flowing in inner through-hole conductor 38 whensecond conductive portion (28 a) and fourth conductive portion (28 b)are connected by four outer through-hole conductors 40. FIG. 2J is aview showing the magnetic fields generated by the current flowing inouter through-hole conductors 40 and the magnetic fields generated bythe current flowing in inner through-hole conductor 38 when secondconductive portion (28 a) and fourth conductive portion (28 b) areconnected by five outer through-hole conductors 40. FIG. 2K is a viewshowing the magnetic fields generated by the current flowing in outerthrough-hole conductors 40 and the magnetic fields generated by thecurrent flowing in inner through-hole conductor 38 when secondconductive portion (28 a) and fourth conductive portion (28 b) areconnected by six outer through-hole conductors 40.

As seen in FIGS. 2I, 2J and 2K, the greater the number of outerthrough-hole conductors 40, the greater the percentage of generatedmagnetic fields that offsets the magnetic fields generated by thecurrent flowing in inner through-hole conductor 38. Accordingly,shielding effects increase against the magnetic fields generated by thecurrent flowing in inner through-hole conductor 38.

Also, as shown in FIG. 2L, in wiring board 10 of the present embodiment,first conductive portion (24 a), third conductive portion (24 b), secondconductive portion (28 a) and fourth conductive portion (28 b) are madeup of copper foil (202 a) formed on insulative substrate 22, electrolessplated film (208 a) formed on copper foil (202 a) and electrolyticplated film (208 b) formed on electroless plated film (208 a). Innerthrough-hole conductor 38 and outer through-hole conductors 40 are madeup of electroless plated film (208 a) formed on the wall surfaces ofpenetrating holes in insulative substrate 22 and of electrolytic platedfilm (208 b) filled in the space encapsulated by electroless plated film(208 a).

The width of first conductive portion (24 a) and third conductiveportion (24 b) is set greater than the width of inner through-holeconductor 38. The width of second conductive portion (28 a) and fourthconductive portion (28 b) is set greater than the width of outerthrough-hole conductors 40. First conductive portion (24 a), thirdconductive portion (24 b), second conductive portion (28 a) and fourthconductive portion (28 b) may be formed only with a plated cover layer(through-hole land) of a through-hole conductor, or they may be formedwith a plated cover layer and a conductive circuit extended from theplated cover layer.

Moreover, the surface of first conductive portion (24 a) and the surfaceof second conductive portion (28 a) are positioned on substantially thesame plane, and the surface of third conductive portion (24 b) and thesurface of fourth conductive portion (28 b) are positioned onsubstantially the same plane.

According to wiring board 10 of the present embodiment, firstpenetrating hole (22 a) and second penetrating holes (36 a) formedaround first penetrating hole (22 a) may be simultaneously filled withplating. Therefore, inner through-hole conductor 38 and outerthrough-hole conductors 40 may be formed simultaneously altogether byone plating process. As a result, a simplified manufacturing process isachieved.

Furthermore, since second conductive portion (28 a) and fourthconductive portion (28 b) are connected by multiple outer through-holeconductors 40, cross-sectional areas of conductors actually increaseeven if through-hole conductors are set to have smaller diameters. Thus,impedance does not increase in the voltage-supply circuits includingouter through-hole conductors. As a result, suppressing fluctuations inpower-source voltage becomes easier and regular transistor operationsare maintained.

As shown in FIG. 3, part of reinforcing material (20 a) (such as glassfiber) protrudes into inner through-hole conductor 38 and outerthrough-hole conductors 40. Accordingly, tensile stress in directions Z(in lamination directions) is mitigated from being exerted on innerthrough-hole conductor 38 and outer through-hole conductors 40.

As shown in FIGS. 4A and 4B, wiring board 10 (core substrate 20) of thepresent embodiment has first through-hole structure (30 a) and secondthrough-hole structure (30 b) which are formed with inner through-holeconductor 38 and multiple outer through-hole conductors 40 positionedaround inner through-hole conductor 38. Then, outer through-holeconductors 40 in first through-hole structure (30 a) are electricallyconnected to inner through-hole conductor 38 in second through-holestructure (30 b). Moreover, inner through-hole conductor 38 in firstthrough-hole structure (30 a) is electrically connected to outerthrough-hole conductors 40 in second through-hole structure (30 b).First through-hole structure (30 a) and second through-hole structure(30 b) are used as power-source through holes. Namely, for example,power source (Vcc) is connected to inner through-hole conductors 38 infirst through-hole structure (30 a) and second through-hole structure(30 b), and outer through-hole conductors 40 in first through-holestructure (30 a) and second through-hole structure (30 b) areelectrically connected to external electronic component (Ep) such as aCPU (Central Processing Unit) or MPU (Micro Processing Unit) mounted onwiring board 10. Then, power-source current from power-source (Vcc)flows through transmission lines (Cv) that connect each node to supplypower to each node. Here, as seen in FIGS. 4A and 4B, outer through-holeconductors 40 and inner through-hole conductors 38 are set to have equalelectrical potential in first through-hole structure (30 a) and secondthrough-hole structure (30 b).

In the present embodiment, inductors are formed by outer through-holeconductors 40 and inner through-hole conductor 38 in first through-holestructure (30 a) and second through-hole structure (30 b) as shown inFIG. 4B. As shown in FIG. 4A, in first through-hole structure (30 a) andsecond through-hole structure (30 b), directions of electric currentflowing through outer through-hole conductors 40 and inner through-holeconductor 38 are opposite each other, one in an upward direction and theother in a downward direction. Thus, part of the magnetic flux (φ)generated in the inductors formed respectively by outer through-holeconductors 40 and inner through-hole conductor 38 is offset.Accordingly, impedance in transmission lines decreases in wiring board10, and malfunctions and operational delays are suppressed fromoccurring in a CPU or an MPU. Furthermore, because of such structures,the flexibility of designing transmission lines in wiring board 10 orthe flexibility of positioning an electronic component to be mounted onwiring board 10 increases. For example, a VRM for constant voltagesupply may be positioned near the CPU or MPU.

Furthermore, as previously shown in FIG. 1, core substrate 20 has thirdthrough-hole conductor 42 to connect fifth conductive portion (24 a−1)and sixth conductive portion (24 b−1). Third through-hole conductor 42is formed by filling plating in third penetrating hole (22 b) formed ininsulative substrate 22. Third through-hole conductor 42 works as asignal conductor.

Buildup layer 50 is formed on the first surface of core substrate 20 andbuildup layer 60 is formed on the second surface of core substrate 20.Buildup layer 50 is made up of first layer 70, second layer 90 and thirdlayer 110 formed in that order from the side of core substrate 20. Also,buildup layer 60 is made up of first layer 80, second layer 100 andthird layer 120 formed in that order from the side of core substrate 20.First layer 70 has insulation layer 72 and wiring layer 74, which isformed on the upper surface of insulation layer 72. First layer 80 hasinsulation layer 82 and wiring layer 84, which is formed on the lowersurface of insulation layer 82.

Insulation layer 72 is formed on the first surface of core substrate 20as shown in FIG. 1. Insulation layer 82 is formed on the second surfaceof core substrate 20.

Via holes (72 a) are formed in insulation layer 72 and via holes (82 a)are formed in insulation layer 82. Then, plating is filled in via holes(72 a, 82 a) to form via conductors 76 and via conductors 86respectively.

Insulation layers (72, 82) are made of cured prepreg, for example. Asfor such a prepreg, for example, the following may be used: those madeby impregnating a base material such as glass fiber or aramid fiber witha resin such as epoxy resin, polyester resin, bismaleimide-triazineresin (BT resin), imide resin (polyimide), phenol resin or allylpolyphenylene-ether resin (A-PPE resin). Instead of prepreg, liquid orfilm-type thermosetting resins, thermoplastic resins or compounds ofthose resins may be used. Furthermore, RCF (resin-coated copper foil)may also be used.

In the present embodiment, via conductors (76, 86) are filled vias.However, via conductors (76, 86) are not limited to such, and they maybe conformal vias.

Wiring layer 74 includes conductor (74 a) positioned over innerthrough-hole conductor 38. Conductor (74 a) is connected to firstconductive portion (24 a) by via conductor 76.

Wiring layer 84 includes conductor (84 a) positioned under innerthrough-hole conductor 38. Conductor (84 a) is connected to thirdconductive portion (24 b) by via conductor 86.

In the present embodiment, via conductor 76 is positioned substantiallyalong the central axis of inner through-hole conductor 38. However, theposition of via conductor 76 is not limited to such, and it may beshifted away from inner through-hole conductor 38 in a directionparallel to the surface of insulative substrate 22. When via conductor76 is shifted in a direction parallel to the first surface of insulativesubstrate 22 from the center of inner through-hole conductor 38, viaconductor 76 is connected to first conductive portion (24 a) with highlyflat features, thus ensuring connection reliability.

As shown in FIG. 1, second layer 90 has insulation layer 92 and wiringlayer 94, which is formed on the upper surface of insulation layer 92.Also, second layer 100 has insulation layer 102 and wiring layer 104,which is formed on the lower surface of insulation layer 102. Inaddition, third layer 110 has insulation layer 112 and wiring layer 114,which is formed on the upper surface of insulation layer 112, and thirdlayer 120 has insulation layer 122 and wiring layer 124, which is formedon the lower surface of insulation layer 122.

Via holes (92 a) and (102 a) are formed in their respective insulationlayers 92 and 102. Via conductors 96 and 106, which are filled vias, areformed by filling plating in their respective via holes (92 a) and (102a). In addition, wiring layers 94 and 104 are formed respectively on theupper surface of insulation layer 92 and on the lower surface ofinsulation layer 102. Wiring layer 74 and wiring layer 94 are connectedby via conductors 96, and wiring layer 84 and wiring layer 104 areconnected by via conductors 106.

Also, insulation layers 112 and 122 are formed respectively on the uppersurface of insulation layer 92 and on the lower surface of insulationlayer 102. Then, wiring layer 94 and wiring layer 114 are connected byvia conductors 116 formed in via holes (112 a) in insulation layer 112.Wiring layer 104 and wiring layer 124 are connected by via conductors126 formed in via holes (122 a) in insulation layer 122.

Then, solder-resist layer 131 is formed on the upper surface ofinsulation layer 112, and solder-resist layer 141 is formed on the lowersurface of insulation layer 122. Solder-resist layers (131, 141) aremade of resin such as photosensitive resin using acrylic-epoxy resin,thermosetting resin primarily containing epoxy resin, or UV curing resinand so forth.

Openings exposing part of wiring layer 114 and openings exposing part ofwiring layer 124 are formed respectively in solder-resist layer 131 andsolder-resist layer 141. Part of wiring layer 114 and part of wiringlayer 124 are used as solder pads. Solder connection layers (132, 142)are formed on their respective solder pads to enhance solderability.Then, external connection terminals (150, 160) are formed on theirrespective solder connection layers (132, 142). External connectionterminals (150, 160) are used for electrical connection with otherwiring boards and electronic components. Moreover, if required,electronic components such as a VRM (Voltage Regulator Module) may bemounted in wiring board 10 for a constant voltage supply to a CPU or anMPU.

Next, a method for manufacturing wiring board 10 is described withreference to FIGS. 5˜8.

Forming Core Substrate 20

First, as shown in FIG. 5A, copper-clad laminate 200 is prepared byplacing copper foil (202 a) and copper foil (202 b) on a first surfaceand a second surface of insulative substrate 22 and by pressing them.

Accordingly, as shown in FIG. 5B, copper-clad laminate 200 is obtained,being made of insulative substrate 22, copper foil (202 a) formed on thefirst surface of insulative substrate 22 and copper foil (202 b) formedon the second surface of insulative substrate 22.

Next, black-oxide treatment is performed on the surfaces of copper foils(202 a, 202 b) using an oxidation solution. In doing so, copper foils(202 a, 202 b) are blackened, and laser absorption rates increase duringlaser processing.

Next, as shown in FIG. 5C, a laser is used to bore first penetratinghole (22 a), second penetrating holes (36 a) and third penetrating hole(22 b). Here, a carbon-dioxide gas (CO₂) laser or a UV-YAG laser, forexample, is irradiated on the first and second surfaces of copper-cladlaminate 200. Either a laser whose energy is higher in the center thanon the periphery, or a laser with multiple pulses is irradiated. Whenirradiating a laser with multiple pulses, it is preferred to reduce thelaser diameter gradually from the first pulse toward the final pulse.Alternatively, a laser whose energy density is higher in the center thanon the periphery may be used for the final pulse. The number of lasershots here is not limited specifically. Lasers may be irradiatedseparately on each surface, or simultaneously on both surfaces.

Multiple second penetrating holes (36 a) are each formed atsubstantially even intervals around first penetrating hole (22 a) one ata time or all of them simultaneously with first penetrating hole (22 a)positioned at their center. Here, the opening shape of first penetratinghole (22 a) and second penetrating holes (36 a) is circular. However,their opening shape is not limited to such and it may be oval, forexample. Second penetrating holes (36 a) may be bored after firstpenetrating hole (22 a) is bored. Alternatively, second penetratingholes (36 a) may be bored before first penetrating hole (22 a) is bored,or first penetrating hole (22 a) and second penetrating holes (36 a) maybe bored simultaneously.

Third penetrating hole (22 b) is formed to have a smaller diameter inthe central portion than the opening diameters on the first and secondsurfaces of insulative substrate 22. However, third penetrating hole (22b) is not limited to being formed as such, and the opening diameter onthe second surface may be set smaller than the opening diameter on thefirst surface. Alternatively, the wall surfaces of third penetratinghole (22 b) may be set perpendicular to the first and second surfaces.

In the present embodiment, the opening shape of third penetrating hole(22 b) is circular. However, it is not limited to such, and it may beoval, for example. Also, in the present embodiment, a laser is used tobore first penetrating hole (22 a), second penetrating holes (36 a) andthird penetrating hole (22 b). However, boring the holes is not limitedto using a laser, and a drill may also be used. In such a case, thediameters of penetrating holes are substantially the same in a thicknessdirection of insulative substrate 22.

Next, as shown in FIG. 5D, electroless plating and electrolytic platingare performed to form plated film 208 made of copper, for example, infirst penetrating hole (22 a), second penetrating holes (36 a) and thirdpenetrating hole (22 b) as well as on substrate surfaces. Plating film208 is made up of electroless plated film (208 a) and electrolyticplated film (208 b) (FIG. 2L). Then, first penetrating hole (22 a),second penetrating holes (36 a) and third penetrating hole (22 b) arefilled with plating, and outer through-hole conductors 40, innerthrough-hole conductor 38 and third through-hole conductor 42 are formedrespectively. Here, outer through-hole conductors 40, inner through-holeconductor 38 and third through-hole conductor 42 are made from copper.However, they may also be made from other conductive material such asnickel. Also, in the present embodiment, outer through-hole conductors40 and inner through-hole conductor 38 are formed by pulse plating ordirect-current plating. In doing so, voids are suppressed fromoccurring.

Next, as shown in FIG. 5E, the plated films are patterned by a tentingmethod using etching resists 211. Namely, to protect portions to form apattern and inner through-hole conductor 38, they are covered withetching resists 211 having openings, then the plated film (conductivelayer) exposed through the openings is etched. Accordingly, as shown inFIG. 5F, conductive portions (24 a, 24 b, 28 a, 28 b) are formed. Thewidth of first conductive portion (24 a) and third conductive portion(24 b) is set greater than inner through-hole conductor 38, and thewidth of second conductive portion (28 a) and fourth conductive portion(28 b) is set greater than outer through-hole conductor 40.

Then, if required, surfaces of conductive portions (24 a, 24 b, 28 a, 28b) are roughened by etching, for example. In doing so, adhesiveness isenhanced between first conductive portion (24 a), third conductiveportion (24 b), second conductive portion (28 a) and fourth conductiveportion (28 b) and insulation layers (72, 82) which are formed as theirupper layers (see FIG. 6). Core substrate 20 is obtained through theabove procedures.

Forming Buildup Layer 50 and Buildup Layer 60

Next, film-type thermosetting resin is placed on the first and secondsurfaces of core substrate 20, which are then thermal pressed.Accordingly, as shown in FIG. 6A, insulation layers (72, 82) are formedrespectively on the first surface and the second surface of coresubstrate 20. Insulation layers (72, 82) may also be formed by coatingwith liquid-type thermosetting resin using a method such as a screenprinting method and a curtain-coating method.

After that, as shown in FIG. 6B, a laser is used to bore via holes (72a, 82 a) in their respective insulation layers (72, 82). Here, via holes(72 a, 82 a) are bored so that their central axes correspond to thecentral axis of inner through-hole conductor 38. Then, to removesmearing or the like remaining at the bottoms of via holes (72 a, 82 a),desmearing treatment is performed.

Next, as shown in FIGS. 6C˜6F, wiring layer 74 which includes conductor(74 a) and wiring layer 84 which includes conductor (84 a) are formed oninsulation layer 72 and insulation layer 82 respectively.

Specifically, the laminate shown in FIG. 6B is immersed in a solutioncontaining a catalyst such as palladium. Accordingly, the catalyst isadsorbed on the surfaces of insulation layers (72, 82). Then, as shownin FIG. 6C, the substrate with adsorbed catalyst is immersed in anelectroless copper plating solution to form electroless plated film (210a) on the surfaces of insulation layers (72, 82).

After that, a dry-film photosensitive resist is laminated on bothsurfaces of the laminate. Then, a mask film with a predetermined patternis adhered to each photosensitive resist, which is then exposed toultraviolet rays and developed with an alkaline solution. Accordingly,as shown in FIG. 6D, plating resist layers 212 are formed havingopenings in regions where conductors are formed later.

Next, after the laminate is washed with water and dried, electrolyticplating is performed using the electroless plated film as a seed layer.Accordingly, as shown in FIG. 6E, wiring layer 74 having conductor (74a) and wiring layer 84 having conductor (84 a) are formed in theirrespective openings in plating resist layers 212. During that time, viaholes (72 a, 82 a) are filled with plating, and via conductors (76, 86)are formed respectively.

Here, via conductors (76, 86) are formed so that each central axiscorresponds to the central axis of inner through-hole conductor 38.

Next, plating resist layers 212 are removed, and the laminate is washedwith water and dried. Then, exposed electroless plated film (210 a) isremoved by etching. Accordingly, as shown in FIG. 6F, a laminate isobtained where first layers (70, 80) are laminated respectively on theupper and lower surfaces of core substrate 20.

Then, by repeating the steps shown in FIGS. 6C˜6F, second layers (90,100) and third layers (110, 120) are formed in that order on the upperand lower surfaces of core substrate 20 as shown in FIGS. 6G and 6H.Accordingly, a laminate is obtained where buildup layers (50, 60) arelaminated on core substrate 20.

Here, in wiring board 10 (core substrate 20), first through-holestructure (30 a) and second through-hole structure (30 b) are formed,being made up of inner through-hole conductor 38 and multiple outerthrough-hole conductors 40 (see FIG. 4A). Then, outer through-holeconductors 40 in first through-hole structure (30 a) are electricallyconnected to inner through-hole conductor 38 in second through-holestructure (30 b). Furthermore, inner through-hole conductor 38 in firstthrough-hole structure (30 a) is electrically connected to outerthrough-hole conductors 40 in second through-hole structure (30 b).

Forming Solder-Resist Layer 131 and Solder-Resist Layer 141

Next, on the upper and lower surfaces of the laminate shown in FIG. 6H,liquid or dry-film photosensitive resist (solder resist) is eitherapplied or laminated to form solder-resist layers (131, 141) on theupper and lower surfaces of the laminate as shown in FIG. 7A.

Then, a photomask film having a conductive pattern (opening portions) isadhered on the surfaces of solder-resist layers (131, 141), exposed toultraviolet rays and developed with an alkaline solution. Accordingly,as shown in FIG. 7B, opening portions (130 a, 140 a) are formed insolder-resist layers (131, 141). Such opening portions (130 a, 140 a)are for exposing the portions which later become solder pads in wiringlayers (114, 124).

Surface Treatment

Next, as shown in FIG. 8A, solder connection layers (132, 142) areformed in opening portions (130 a, 140 a) respectively. Solderconnection layers (132, 142) are plating layers to enhance thesolderability of solder pads, and are made up of a nickel-plated layerand a gold-plated layer.

A nickel-plated layer is formed by immersing the laminate in anelectroless nickel plating solution, and a gold-plated layer is formedby immersing the laminate in an electroless gold plating solution. Here,solder connection layers (132, 142) may also be formed as atriple-plated layer of nickel-palladium-gold. Alternatively, solderconnection layers (132, 142) may be formed as a single-plated layer ofgold, silver, tin or the like, or they may be formed with a resin filmsuch as flux.

Next, as shown in FIG. 8B, solder paste is printed on solder connectionlayers (132, 142), and reflowed to form external connection terminals(150, 160). Accordingly, wiring board 10 is manufactured.

In the present embodiment, the direction of the current in multipleouter through-hole conductors 40 and the direction of the current ininner through-hole conductor 38 are set opposite from each other. Indoing so, part of the magnetic fields generated by the current flowingin each outer through-hole conductor 40 and part of the magnetic fieldsgenerated by the current flowing in inner through-hole conductor 38 areoffset from each other. Accordingly, impedance in transmission linesdecreases and malfunctions and operational delays are suppressed fromoccurring in a CPU or MPU.

Also, since impedance in transmission lines decreases, voltage loss isreduced. Thus, chip capacitors are not required to be inserted intransmission lines for a constant voltage supply. As a result,manufacturing costs decrease.

Also, in the present embodiment, by forming VRM inductors in a wiringboard so as to install a VRM in the wiring board, voltage for a CPU issupplied without loss. Accordingly, the number of chip capacitorsrequired to supply power at a constant voltage is reduced.

Moreover, a capacitor required for a VRM may be arranged in a wiringboard. For example, as shown in FIG. 9, chip capacitor 170 may be formedin insulative substrate 22. Furthermore, as shown in FIG. 10, thin-filmcapacitor 180 may also be formed on an insulation layer. Such thin-filmcapacitor 180 is made of a pair of opposing electrodes (182, 186) and ofceramic dielectric layer 184 sandwiched between the electrodes.

A wiring board according to the present invention is not limited to theabove embodiment, and various modifications may be made within a scopethat does not deviate from the gist of the invention.

For example, in the above embodiment, the quality, size, number oflayers and so forth may be modified freely in each layer.

Also, in wiring board 10 of the above embodiment, buildup layers (50,60) formed on both surfaces of core substrate 20 have a triple-layerstructure with first layer 70, second layer 90 and third layer 110, andwith first layer 80, second layer 100 and third layer 120 respectively.However, the present embodiment is not limited to such, and the layersmay have a single-layer structure or a double-layer structure.Alternatively, they may have a structure of four or more layers. Inaddition, the number of layers in buildup layers (50, 60) may bedifferent from each other. Furthermore, such a buildup layer may beformed only on one main surface. Yet alternatively, external connectionterminals for connection with electronic components may be formed onlyon one main surface of the wiring board.

In the method for manufacturing a wiring board described in the aboveembodiment, the order may be modified properly within a scope that doesnot deviate from the gist of the present invention. Also, some steps maybe omitted according to usage requirements or the like. For example,conductive patterns of wiring layers may be formed by a semi-additivemethod, a subtractive method or any other method.

A wiring board according to one aspect of the present invention has thefollowing: a substrate with a first surface and a second surface andhaving a first penetrating hole and second penetrating holes formedaround the first penetrating hole; a first conductive portion formed onthe first surface of the substrate; a second conductive portion formedon the first surface of the substrate to be positioned around the firstconductive portion; a third conductive portion formed on the secondsurface of the substrate; a fourth conductive portion formed on thesecond surface of the substrate to be positioned around the thirdconductive portion; a first through-hole conductor formed in the firstpenetrating hole and electrically connecting the first conductiveportion and the third conductive portion; and multiple secondthrough-hole conductors formed in the first penetrating hole andelectrically connecting the second conductive portion and the fourthconductive portion. In such a wiring board, the first through-holeconductor and the second through-hole conductors are made of conductivematerial filled in the first penetrating hole or the second penetratingholes.

A method for manufacturing a wiring board according to another aspect ofthe present invention includes the following: preparing a substratehaving a first surface and a second surface; forming a first penetratinghole in the substrate while forming second penetrating holes around thefirst penetrating hole; on the first surface of the substrate, forming afirst conductive portion and a second conductive portion positionedaround the first conductive portion; on the second surface of thesubstrate, forming a third conductive portion and a fourth conductiveportion positioned around the third conductive portion; in the firstpenetrating hole, forming a first through-hole conductor which connectsthe first conductive portion and the third conductive portion; and inthe second penetrating holes, forming multiple second through-holeconductors which connect the second conductive portion and the fourthconductive portion. In such a method, the first through-hole conductorand the second through-hole conductors are formed by filling aconductive material in the first penetrating hole and the secondpenetrating holes.

Obviously, numerous modifications and variations of the presentinvention are possible in light of the above teachings. It is thereforeto be understood that within the scope of the appended claims, theinvention may be practiced otherwise than as specifically describedherein.

What is claimed is:
 1. A wiring board, comprising: a substrate having afirst penetrating hole and a plurality of second penetrating holesformed around the first penetrating hole; a first conductive portionformed on a first surface of the substrate and positioned at a first endportion of the first penetrating hole; a second conductive portionformed on the first surface of the substrate and positioned at first endportions of the second penetrating holes around the first conductiveportion; a third conductive portion formed on a second surface of thesubstrate on an opposite side of the first surface and positioned at asecond end portion of the first penetrating hole; a fourth conductiveportion formed on the second surface of the substrate and positioned atsecond end portions of the second penetrating holes around the thirdconductive portion; a first through-hole conductor formed in the firstpenetrating hole and comprising a conductive material filling the firstpenetrating hole of the substrate, the first through-hole conductorelectrically connecting the first conductive portion and the thirdconductive portion; a plurality of second through-hole conductors formedin the second penetrating holes and comprising a conductive materialfilling the second penetrating holes, the plurality of secondthrough-hole conductors electrically connecting the second conductiveportion and the fourth conductive portion; and a second through-holestructure comprising a third through-hole conductor and a plurality offourth through-hole conductors formed around the third through-holeconductor, wherein the substrate includes a reinforcing material havingportions protruding into the first through-hole conductor and secondthrough-hole conductors, respectively, the first through-hole conductorand second through-hole conductors form a first through-hole structure,the first through-hole conductor in the first through-hole structure iselectrically connected to the plurality of fourth through-holeconductors in the second through-hole structure, and the secondthrough-hole conductors in the first through-hole structure areelectrically connected to the third through-hole conductor in the secondthrough-hole structure.
 2. The wiring board according to claim 1,wherein at least one of the conductive materials of the firstthrough-hole conductor and the plurality of second through-holeconductors is a copper plating.
 3. The wiring board according to claim1, wherein the second through-hole structure is formed in the substrate,and the first through-hole structure has an electrical potential whichis equal to an electrical potential of the second through-holestructure.
 4. The wiring board according to claim 1, wherein the secondthrough-hole structure is formed in the substrate, and the firstthrough-hole structure and second through-hole structure arepower-source conductors.
 5. The wiring board according to claim 1,wherein the first conductive portion and the second conductive portionare formed such that the first conductive portion and the secondconductive portion are separated from each other.
 6. The wiring boardaccording to claim 1, wherein the second conductive portion has asubstantially annular shape.
 7. The wiring board according to claim 1,wherein the second through-hole conductors are positioned at evenintervals in a circumferential direction of the first through-holeconductor.
 8. The wiring board according to claim 1, wherein the firstthrough-hole conductor and the second through-hole conductors areconfigured such that in the first through-hole conductor and the secondthrough-hole conductors, currents flow in opposite directions.
 9. Thewiring board according to claim 1, wherein the first through-holeconductor and the second through-hole conductors form inductors.
 10. Thewiring board according to claim 1, wherein the substrate comprises thereinforcing material impregnated with a resin.
 11. The wiring boardaccording to claim 1, wherein the reinforcing material is a glass fibermaterial, and the substrate comprises the glass fiber materialimpregnated with a resin.
 12. The wiring board according to claim 1,further comprising a buildup layer formed on the first surface of thesubstrate.
 13. The wiring board according to claim 1, wherein each ofthe first through-hole conductor and second through-hole conductors hasa cylindrical shape having a narrower central portion.
 14. The wiringboard according to claim 1, further comprising: a first buildup layerformed on the first surface of the substrate; and a second buildup layerformed on the second surface of the substrate.
 15. The wiring boardaccording to claim 1, wherein each of the first through-hole conductorand second through-hole conductors has a cylindrical shape having anarrower central portion, and the first through-hole conductor andsecond through-hole conductors comprise a plating material substantiallyfilling the first penetrating hole and second penetrating holes,respectively.
 16. The wiring board according to claim 1, wherein each ofthe first conductive portion, second conductive portion, thirdconductive portion and fourth conductive portion comprises a copper foilportion, an electroless plated film portion formed on the copper foilportion and an electrolytic plated film portion formed on theelectroless plated film portion, and the first through-hole conductorand second through-hole conductors comprise electroless plated filmportions formed on wall surfaces of the first penetrating hole andsecond penetrating holes and electrolytic plated film portions fillingspaces encapsulated by the electroless plated film portions,respectively.
 17. The wiring board according to claim 1, wherein thefirst through-hole conductor and second through-hole conductors compriseelectroless plated film portions formed on wall surfaces of the firstpenetrating hole and second penetrating holes and electrolytic platedfilm portions filling spaces encapsulated by the electroless plated filmportions, respectively.
 18. The wiring board according to claim 1,wherein each of the first through-hole conductor, second through-holeconductors, third through-hole conductor and fourth through-holeconductors has a cylindrical shape having a narrower central portion.19. The wiring board according to claim 1, wherein the thirdthrough-hole conductor is formed in a third penetrating hole formedthorough the substrate, the plurality of fourth through-hole conductorsis formed on a plurality of fourth penetrating holes formed through thesubstrate around the third through-hole conductor, and each of the firstthrough-hole conductor, second through-hole conductors, thirdthrough-hole conductor and fourth through-hole conductors has acylindrical shape having a narrower central portion, and the firstthrough-hole conductor, second through-hole conductors, thirdthrough-hole conductor and fourth through-hole conductors comprise aplating material substantially filling the first penetrating hole,second penetrating holes, third penetrating hole and fourth penetratingholes, respectively.